A conventional image coding device for coding a video sequence divides each picture included in the video sequence into macroblocks, and performs coding for each of the macroblocks. The size of a macroblock is 16 pixels high and 16 pixels wide. Then, the conventional image coding device generates a coded stream, that is, a coded video sequence. After this, a conventional image decoding device decodes this coded stream on a macroblock-by-macroblock basis to reproduce the pictures of the original video sequence.
The conventional coding methods include the International Telecommunication Union Telecommunication Standardization Sector (ITU-T) H.264 standard (see Non Patent Literature 1, for example). The H.264 standard employs variable-length coding. By the variable-length coding process, each macroblock is coded into a variable-length code. Moreover, in each of processes such as intra-picture prediction, motion vector calculation, and deblocking filtering based on the H.264 standard, there is a data dependency relationship between a target macroblock to be coded or decoded and another macroblock adjacent to this target macroblock.
FIG. 47 is a diagram showing the data dependency relationship.
As shown in FIG. 47, when intra-picture prediction is performed on a decoding-target macroblock MBx, pixels in macroblocks MBa to MBd adjacent to the target macroblock MBx are used. Similarly, when a motion vector of the target macroblock MBx is calculated, motion vectors of the macroblocks MBa to MBc adjacent to the target macroblock MBx are used. Moreover, when deblocking filtering is performed on the target macroblock MBx, the pixels in the macroblocks MBa and MBb adjacent to the target macroblock MBx are used.
In view of this, the image decoding device based on the H.264 standard usually needs to decode each of the macroblocks included in the current picture from the beginning of the coded stream. For this reason, the image decoding device and the image coding device adopting the H.264 standard usually cannot employ parallel processing with which the processing speed is increased. This means that each of these image decoding and coding devices has to speed up the processing by increasing an operating frequency.
Here, some of the conventional technologies solve such a problem (see Patent Literature 1, for example).
FIG. 48A is a block diagram showing a configuration of an image decoding device disclosed in Patent Literature 1 mentioned above.
As shown in FIG. 48A, an image decoding device 1000 in Patent Literature 1 includes two decoding units (codec elements) 1300a and 1300b which operate in parallel. This allows performance to be increased. To be more specific, a stream analysis unit 1100 supplies a coded stream to each of the two decoding units 1300a and 1300b, and a macroblock pipeline control unit 1200 controls pipeline operations performed by the two decoding units 1300a and 1300b. Here, each of the decoding units 1300a and 1300b includes a VLC 1301 which performs variable-length decoding, a TRF 1302 which performs inverse quantization and inverse frequency transform, and an MC 1303 which performs motion compensation. That is, each of the decoding units 1300a and 1300b performs variable-length decoding, inverse quantization, inverse frequency transform, and motion compensation to decode a target macroblock (i.e., to perform inter-picture prediction decoding).
FIG. 48B is a diagram explaining an operation performed by the image decoding device 1000 disclosed in Patent Literature 1.
In Patent Literature 1, as shown in FIG. 48B, the macroblock pipeline control unit 1200 causes positions of macroblocks respectively decoded by the decoding units 1300a and 1300b to be shifted from each other by two macroblocks in a horizontal direction (and by one macroblock in a vertical direction). Moreover, the macroblock pipeline control unit 1200 causes each of the decoding units 1300a and 1300b to perform a decoding sub-process (one of variable-length decoding, inverse quantization, inverse frequency transform, and motion compensation) on a corresponding one of the two target macroblocks, for each time slot (TS) within a length of the TS. More specifically, the macroblock pipeline control unit 1200 controls the decoding units 1300a and 1300b so that each of the decoding units 1300a and 1300b decodes one macroblock for each predetermined period within a length of the predetermined period. In other words, the decoding units 1300a and 1300b are controlled so as to operate in synchronization with each other on a macroblock-by-macroblock basis. In this way, the data dependency relationship is maintained, and decoding is accordingly performed by parallel processing.